Semiconductor device designers often desire to increase the level of integration or density of features within a semiconductor device by reducing the dimensions of the individual features and by reducing the separation distance between neighboring features. In addition, semiconductor device designers often desire to design architectures that are not only compact, but offer performance advantages, as well as simplified designs.
A relatively common semiconductor device is a memory device. A memory device may include a memory array having a number of memory cells arranged in a grid pattern. One type of memory cell is a dynamic random access memory (DRAM). In the simplest design configuration, a DRAM cell includes one access device, such as a transistor, and one storage device, such as a capacitor. Modern applications for memory devices can utilize vast numbers of DRAM unit cells, arranged in an array of rows and columns. The DRAM cells are electrically accessible through digit lines and word lines arranged along the rows and columns of the array.
Reducing the dimensions and spacing of memory device features places ever increasing demands on the methods used to form the memory device features. For example, DRAM device manufacturers face a tremendous challenge on reducing the DRAM cell area as feature spacing decreases to accommodate increased feature density. Reducing spacing between closely arranged digit lines can lead to undesirable electrical coupling (e.g., capacitive coupling) effects that can result in significant sense margin loss for high-speed DRAM applications. One approach to reducing such undesirable electrical coupling effects has been to form air gaps (e.g., voids spaced) adjacent the digit lines of the array. However, conventional processes of forming such air gaps can undesirably attack (e.g., etch) the conductive material (e.g., metal) of other features (e.g., redistribution layer (RDL) structures) of the array located proximate the air gaps. Such attack can effectuate reduced feature and device reliability, often resulting in the deposition of the conductive material within the air gaps that can effectuate electrical shorts during use and operation of the DRAM device.
A need, therefore, exists for new, simple, and cost-efficient methods of forming semiconductive device structures for a semiconductor device (e.g., a DRAM device), such as, for example, DRAM device structures including air gaps adjacent digit lines thereof.